Enhanced TDMoIP/SAToP/CESoPSN Pseudowire Gateway Solution with High-precision Clock Recovery (TXC-06010)
PacketTrunkTM-4 Plus is an interworking gateway device that transparently transports TDM trunks over packet-switched networks (PSNs) using the TDMoIP, SAToP, and CESoPSN standards for T/E carrier circuit emulation services (CES). The single-chip device includes robust clock recovery, encapsulation, jitter and wander compensation, QoS support, and support for transport of structured and unstructured TDM signals. This packet processor serves as a building block for cards and systems requiring circuit emulation over IPv4/v6, MPLS, VLAN-tagged Ethernet, and L2TP.
PacketTrunkTM-4 Plus’s DPLL-based quad adaptive clock recovery block provides rapid frequency lock and highly accurate phase tracking. The block provides ITU-T G.823/G.824 synchronization interface quality jitter and wander performance under real world PSN conditions adaptively by reconstructing the TDM clock based on inter-packet arrival time and jitter buffer fill level, or differentially using RTP. During phase tracking, the chip optimizes jitter buffer levels to minimize latency. Payload size is selectable over a wide range, giving end users maximum tradeoff flexibility between latency and overhead.
PacketTrunkTM-4 Plus is a highly-integrated ASIC designed for use in a wide variety of network access/edge applications that provides a scalable single-chip to multi-chip solution.
- Hardware: T1/E1 Jitter/Wander Control to ITU-T G.823/G.824 “Synchronization Interface”
- Hardware: Lost/Misordered Packet and Delay Variation Compensation
- Hardware: QoS at Layer 2, Layer 3, and Layer 4
- Hardware: Supports CES Standards of IETF, MEF, ITU and MFA
- Hardware: Supports UDP/IP, MPLS, VLAN, and Switched Ethernet, and L2TP Encapsulations
- Software: RTOS-independent API-based Device Driver
- Data Path: Four T1/E1/Serial or One T3/E3
- Data Path: IEEE 802.3 Ethernet MAC
- Data Path: Packet Jitter Buffer SDRAM
- Microprocessor: Packet Jitter Buffer SDRAM
- Other: JTAG Boundary Scan (IEEE 1149.1™)
- Voltage: 1.5V Core, 3.3V I/O
- Temperature Range: Industrial (-40ºC to +85ºC)
- Hardware: Four Independent DPLL-based Clock Recovery Blocks