Highly Integrated Ethernet to PDH Mapper for Wireless and Wireline Applications (TXC-07861)
Summary
The demand for Ethernet services has forced Service Providers to reconsider their deployment strategies of next-generation wireline and wireless platforms. As a result, how can Service Providers offer Ethernet services with minimal impact on capital and operational expenditure.
The EtherMap®-PDH device provides a solution that is cost-effective by re-using both the existing copper infrastructure and the typical SONET/SDH platform at the central office. An EtherMap®-PDH enabled line card on a CPE maps Ethernet frames via GFP/HDLC/LAPS into bonded PDH signals. The ability to extend the Ethernet service to the last-mile will provide a complementary solution to Ethernet-over-SONET/SDH (EoS).
The EtherMap®-PDH device has three unique modes of operation that are applicable to a variety of wireline and wireless applications: E1/T1/J1 – Ethernet frames mapped into 16 x E1/T1/J1, DS3 – Ethernet frames mapped into 3 x DS3, and M13/G.747 – Ethernet and existing legacy services multiplexed into a channelized DS3, with 1+1 protection.
The EtherMap®-PDH device is compliant with the recently ratified ITU-T G.8040 and G.7043 standards. Feature-rich functions such as VLAN separation, Q-in-Q, granular VCGs and over-subscription allow a complete System-on-a-Chip (SoC) solution. The EtherMap®-PDH device can be designed into any platform with PDH interfaces.
Application Diagram
Features
- Hardware: Support for GFP-F (ITU-T G.8040 & G.7043), HDLC (RFC 1662) and LAPS (ITU-T x.86)
- Hardware: PDH virtual concatenation (ITU-T G.7043)
- Hardware: Dynamic bandwidth allocation using LCAS (ITU-T G.7042)
- Hardware: M13/G.747 multiplexing of E1/T1/J1 into channelized DS3 (with 1+1 protection)
- Hardware: 16 Virtual Container Groups (VCGs)
- Hardware: VLAN separation for statistical multiplexing
- Hardware: Q-in-Q (IEEE 802.1 ad)
- Software: API-based device driver
- Data Path: 4 x SMII (support for RMII/MII)
- Data Path: 16 x E1/T1/J1
- Data Path: 3 x DS3
- Microprocessor: Intel/Motorola compatible
- Other: JTAG Boundary Scan (IEEE 1149.1)
Diagram
